On Mon, 10 Feb 2025 15:46:02 +0800, niravkumar.l.rabara@xxxxxxxxx wrote: > From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx> > > Agilex5 SoCFPGA devkit supports a separate NAND daughter board. > Document NAND daughter board compatible string and add board file. > > Changes in v3: > * Document Agilex5 NAND daughter board and use that compatible > in the device tree. > > link to v2: > - https://lore.kernel.org/all/20250205101318.1778757-1-niravkumar.l.rabara@xxxxxxxxx/ > > Changes in v2: > * Use nand flash node name according to dt bindings to fix dt build warnings. > * Arrange node in sequence. > > link to v1: > - https://lore.kernel.org/all/20250107084831.2750035-1-niravkumar.l.rabara@xxxxxxxxx/ > > Niravkumar L Rabara (2): > dt-bindings: intel: document Agilex5 NAND daughter board > arm64: dts: socfpga: agilex5: add NAND daughter board > > .../bindings/arm/intel,socfpga.yaml | 1 + > arch/arm64/boot/dts/intel/Makefile | 1 + > .../dts/intel/socfpga_agilex5_socdk_nand.dts | 89 +++++++++++++++++++ > 3 files changed, 91 insertions(+) > create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts > > -- > 2.25.1 > > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/intel/' for 20250210074604.2410783-1-niravkumar.l.rabara@xxxxxxxxx: arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dtb: clock-controller@ffd10000: 'clocks' is a required property from schema $id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml#
