remove soc0 clock: SOC0_CLK_UART_DIV13 SOC0_CLK_HPLL_DIV_AHB SOC0_CLK_MPLL_DIV_AHB add soc0 clock: SOC0_CLK_AHBMUX SOC0_CLK_MPHYSRC SOC0_CLK_U2PHY_REFCLKSRC add soc1 clock: SOC1_CLK_I3C Signed-off-by: Ryan Chen <ryan_chen@xxxxxxxxxxxxxx> --- include/dt-bindings/clock/aspeed,ast2700-scu.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/dt-bindings/clock/aspeed,ast2700-scu.h b/include/dt-bindings/clock/aspeed,ast2700-scu.h index 63021af3caf5..c7389530629d 100644 --- a/include/dt-bindings/clock/aspeed,ast2700-scu.h +++ b/include/dt-bindings/clock/aspeed,ast2700-scu.h @@ -13,18 +13,17 @@ #define SCU0_CLK_24M 1 #define SCU0_CLK_192M 2 #define SCU0_CLK_UART 3 -#define SCU0_CLK_UART_DIV13 3 #define SCU0_CLK_PSP 4 #define SCU0_CLK_HPLL 5 #define SCU0_CLK_HPLL_DIV2 6 #define SCU0_CLK_HPLL_DIV4 7 -#define SCU0_CLK_HPLL_DIV_AHB 8 +#define SCU0_CLK_AHBMUX 8 #define SCU0_CLK_DPLL 9 #define SCU0_CLK_MPLL 10 #define SCU0_CLK_MPLL_DIV2 11 #define SCU0_CLK_MPLL_DIV4 12 #define SCU0_CLK_MPLL_DIV8 13 -#define SCU0_CLK_MPLL_DIV_AHB 14 +#define SCU0_CLK_MPHYSRC 14 #define SCU0_CLK_D0 15 #define SCU0_CLK_D1 16 #define SCU0_CLK_CRT0 17 @@ -68,6 +67,7 @@ #define SCU0_CLK_GATE_UFSCLK 53 #define SCU0_CLK_GATE_EMMCCLK 54 #define SCU0_CLK_GATE_RVAS1CLK 55 +#define SCU0_CLK_U2PHY_REFCLKSRC 56 /* SOC1 clk */ #define SCU1_CLKIN 0 @@ -160,4 +160,5 @@ #define SCU1_CLK_GATE_PORTDUSB2CLK 85 #define SCU1_CLK_GATE_LTPI1TXCLK 86 +#define SCU1_CLK_I3C 87 #endif -- 2.34.1
