> > + sdcc3bam: dma-controller@12182000 {
> > + compatible = "qcom,bam-v1.3.0";
> > + reg = <0x12182000 0x2000>;
>
> APQ8064 has 0x8000 here, but I think 0x2000 should be enough.
Downstream seems to use 0x2000:
https://codeberg.org/LogicalErzor/Android_Kernel_Samsung_D2/src/branch/cm-14.1/arch/arm/mach-msm/devices-8960.c#L1217
>
> > + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&gcc SDC3_H_CLK>;
> > + clock-names = "bam_clk";
> > + #dma-cells = <1>;
> > + qcom,ee = <0>;
> > + };
>
> Please keep DT nodes sorted on the @reg part. So sdcc3bam goes after
> sdcc3 node, sdcc1bam goes after sdcc1.
Thanks! I've sent in v2.
