Hi Geert,
> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: 06 February 2025 08:50
> Subject: Re: [PATCH v2 0/8] Add RZ/G3E SDHI support
>
> Hi Biju,
>
> On Fri, 31 Jan 2025 at 12:24, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that of
> > the RZ/V2H, but the SD0 channel has only dedicated pins, so we must
> > use SD_STATUS register to control voltage and power enable (internal
> > regulator).
> >
> > For SD1 and SD2 channel we can either use gpio regulator or internal
> > regulator (using SD_STATUS register) for voltage switching.
> >
> > For SD0, fixed voltage(eMMC) uses fixed regulator and non-fixed
> > voltage
> > (SD) uses internal regulator.
>
> Thanks for your series!
>
> > Biju Das (8):
> > dt-bindings: mmc: renesas,sdhi: Document RZ/G3E support
> > mmc: renesas_sdhi: Arrange local variables in reverse xmas tree order
> > mmc: renesas_sdhi: Add support for RZ/G3E SoC
> > arm64: dts: renesas: r9a09g047: Add SDHI0-SDHI2 nodes
> > arm64: dts: renesas: r9a09g057: Add support for enabling SDHI internal
> > regulator
> > arm64: dts: renesas: rzg3e-smarc-som: Enable SDHI{0,2}
> > arm64: dts: renesas: rzg3e-smarc-som: Add support for enable SD on
> > SDHI0
> > arm64: dts: renesas: r9a09g047e57-smarc: Enable SDHI1
>
> Note that this was not sent as a single series: patches 2 and 5 were sent as a separate series.
There was some issue happened while sending v2. I forgot to add email addresses for 2 and 5. I need to resend
that patches with To and CC fixed. On patchwork[1] I see it as a single series.
I will fix this issue while sending V3 with v2 review comments addressed.
https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=929475
Cheers,
Biju
