From: Robert Chiras <robert.chiras@xxxxxxx>
Add compatible strings for i.MX8QM platform. Remove fsl,mipi-phy-gpr from
required properties and add 'phys', since i.MX8QM use standard phy
interface.
Keep the same restriction for other compatible strings.
Signed-off-by: Robert Chiras <robert.chiras@xxxxxxx>
Reviewed-by: Robby Cai <robby.cai@xxxxxxx>
Reviewed-by: Mirela Rabulea <mirela.rabulea@xxxxxxx>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@xxxxxxxxxxx>
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
.../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 30 ++++++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
index 2a14e3b0e0040..91c4d8fbb1f8c 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
@@ -18,6 +18,8 @@ properties:
compatible:
enum:
- fsl,imx8mq-mipi-csi2
+ - fsl,imx8qm-mipi-csi2
+ - fsl,imx8ulp-mipi-csi2
reg:
maxItems: 1
@@ -39,13 +41,18 @@ properties:
- const: ui
power-domains:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
resets:
items:
- description: CORE_RESET reset register bit definition
- description: PHY_REF_RESET reset register bit definition
- description: ESC_RESET reset register bit definition
+ minItems: 1
+
+ phys:
+ maxItems: 1
fsl,mipi-phy-gpr:
description: |
@@ -113,9 +120,28 @@ required:
- clock-names
- power-domains
- resets
- - fsl,mipi-phy-gpr
- ports
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8qm-mipi-csi2
+ - fsl,imx8ulp-mipi-csi2
+ then:
+ required:
+ - phys
+ else:
+ properties:
+ reg:
+ maxItems: 1
+ resets:
+ minItems: 3
+ required:
+ - fsl,mipi-phy-gpr
+
additionalProperties: false
examples:
--
2.34.1
