On Fri, Jan 31, 2025 at 06:17:25PM +0800, Mahesh Rao wrote:
> Convert intel,stratix10-svc service layer devicetree
> binding file from freeform format to json-schema.
>
> Also added DT binding for optional stratix10-soc
> FPGA manager child node.
>
> Signed-off-by: Mahesh Rao <mahesh.rao@xxxxxxxxx>
> ---
> .../bindings/firmware/intel,stratix10-svc.txt | 57 -------------
> .../bindings/firmware/intel,stratix10-svc.yaml | 94 ++++++++++++++++++++++
> 2 files changed, 94 insertions(+), 57 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
> deleted file mode 100644
> index 6eff1afd8daf91714d6a18859667d2607e707da7..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -Intel Service Layer Driver for Stratix10 SoC
> -============================================
> -Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> -processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> -configured from HPS, there needs to be a way for HPS to notify SDM the
> -location and size of the configuration data. Then SDM will get the
> -configuration data from that location and perform the FPGA configuration.
> -
> -To meet the whole system security needs and support virtual machine requesting
> -communication with SDM, only the secure world of software (EL3, Exception
> -Layer 3) can interface with SDM. All software entities running on other
> -exception layers must channel through the EL3 software whenever it needs
> -service from SDM.
> -
> -Intel Stratix10 service layer driver, running at privileged exception level
> -(EL1, Exception Layer 1), interfaces with the service providers and provides
> -the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> -driver also manages secure monitor call (SMC) to communicate with secure monitor
> -code running in EL3.
> -
> -Required properties:
> --------------------
> -The svc node has the following mandatory properties, must be located under
> -the firmware node.
> -
> -- compatible: "intel,stratix10-svc" or "intel,agilex-svc"
> -- method: smc or hvc
> - smc - Secure Monitor Call
> - hvc - Hypervisor Call
> -- memory-region:
> - phandle to the reserved memory node. See
> - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
> - for details
> -
> -Example:
> --------
> -
> - reserved-memory {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - service_reserved: svcbuffer@0 {
> - compatible = "shared-dma-pool";
> - reg = <0x0 0x0 0x0 0x1000000>;
> - alignment = <0x1000>;
> - no-map;
> - };
> - };
> -
> - firmware {
> - svc {
> - compatible = "intel,stratix10-svc";
> - method = "smc";
> - memory-region = <&service_reserved>;
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..e30e79d4c3150f90993e728320e9ef90d484a10d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Service Layer Driver for Stratix10 SoC
> +
> +maintainers:
> + - Dinh Nguyen <dinguyen@xxxxxxxxxx>
> + - Mahesh Rao <mahesh.rao@xxxxxxxxxx>
> +
> +description:
You need '>' on the end to preserve paragraphs.
> + Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> + processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> + configured from HPS, there needs to be a way for HPS to notify SDM the
> + location and size of the configuration data. Then SDM will get the
> + configuration data from that location and perform the FPGA configuration.
> +
> + To meet the whole system security needs and support virtual machine requesting
> + communication with SDM, only the secure world of software (EL3, Exception
> + Layer 3) can interface with SDM. All software entities running on other
> + exception layers must channel through the EL3 software whenever it needs
> + service from SDM.
> +
> + Intel Stratix10 service layer driver, running at privileged exception level
> + (EL1, Exception Layer 1), interfaces with the service providers and provides
> + the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> + driver also manages secure monitor call (SMC) to communicate with secure monitor
> + code running in EL3.
> +
> +properties:
> + compatible:
> + enum:
> + - intel,stratix10-svc
> + - intel,agilex-svc
> +
> + method:
> + description: |
> + Supervisory call method to be used to communicate with the
> + secure service layer.
> + Permitted values are:
> + - "smc" : SMC #0, following the SMCCC
> + - "hvc" : HVC #0, following the SMCCC
Indent by 2 more than 'description'.
> +
> + $ref: /schemas/types.yaml#/definitions/string-array
> + enum:
> + - smc
> + - hvc
> +
> + memory-region:
> + maxItems: 1
> + description:
> + phandle to a reserved memory region for the service layer driver to
> + communicate with the secure device manager. For more details see
> + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.
Please read what that file says.
> +
> + fpga-mgr:
> + $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml
> + description: Optional child node for fpga manager to perform fabric configuration.
> +
> +required:
> + - compatible
> + - method
> + - memory-region
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + service_reserved: svcbuffer@0 {
> + compatible = "shared-dma-pool";
> + reg = <0x0 0x0 0x0 0x1000000>;
> + alignment = <0x1000>;
> + no-map;
> + };
> + };
> +
> + firmware {
> + svc {
> + compatible = "intel,stratix10-svc";
> + method = "smc";
> + memory-region = <&service_reserved>;
> +
> + fpga-mgr {
> + compatible = "intel,stratix10-soc-fpga-mgr";
> + };
> + };
> + };
> +
>
> --
> 2.35.3
>
