On 30/01/2025 08:29, Larisa Grigore wrote:
> Add the two eDMA nodes in the device tree in order to enable the probing
> of the S32G2/S32G3 eDMA driver.
>
> Signed-off-by: Larisa Grigore <larisa.grigore@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 34 ++++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 34 ++++++++++++++++++++++++
> 2 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 7be430b78c83..f73cd5a0906d 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -317,6 +317,23 @@ usdhc0-200mhz-grp4 {
> };
> };
>
> + edma0: dma-controller@40144000 {
> + #dma-cells = <2>;
Any reason for not following DTS coding style in order of properties?
This is odd style.
> + compatible = "nxp,s32g2-edma";
> + reg = <0x40144000 0x24000>,
> + <0x4012c000 0x3000>,
> + <0x40130000 0x3000>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
> + clock-names = "dmamux0", "dmamux1";
> + clocks = <&clks 63>, <&clks 64>;
> + };
> +
> uart0: serial@401c8000 {
> compatible = "nxp,s32g2-linflexuart",
> "fsl,s32v234-linflexuart";
> @@ -333,6 +350,23 @@ uart1: serial@401cc000 {
> status = "disabled";
> };
>
> + edma1: dma-controller@40244000 {
> + #dma-cells = <2>;
> + compatible = "nxp,s32g2-edma";
> + reg = <0x40244000 0x24000>,
> + <0x4022c000 0x3000>,
> + <0x40230000 0x3000>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
interrupts, then interrupt-names but:
> + clock-names = "dmamux0", "dmamux1";
> + clocks = <&clks 63>, <&clks 64>;
here reversed.
Best regards,
Krzysztof
