On 29/01/2025 03:21, Dmitry Baryshkov wrote: > On Mon, Jan 27, 2025 at 05:24:21PM +0100, Krzysztof Kozlowski wrote: >> On 27/01/2025 15:27, Dmitry Baryshkov wrote: >>> On Mon, Jan 27, 2025 at 08:02:12AM +0100, Krzysztof Kozlowski wrote: >>>> On 24/01/2025 11:53, Viken Dadhaniya wrote: >>>>> Data transfer mode is fixed by TrustZone (TZ), which currently restricts >>>>> developers from modifying the transfer mode from the APPS side. >>>>> >>>>> Document the 'qcom,xfer-mode' properties to select the data transfer mode, >>>>> either GPI DMA (Generic Packet Interface) or non-GPI mode (PIO/CPU DMA). >>>>> >>>>> UART controller can operate in one of two modes based on the >>>>> 'qcom,xfer-mode' property, and the firmware is loaded accordingly. >>>>> >>>>> Co-developed-by: Mukesh Kumar Savaliya <quic_msavaliy@xxxxxxxxxxx> >>>>> Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@xxxxxxxxxxx> >>>>> Signed-off-by: Viken Dadhaniya <quic_vdadhani@xxxxxxxxxxx> >>>>> --- >>>>> >>>>> v1 -> v2: >>>>> >>>>> - Drop 'qcom,load-firmware' property and add 'firmware-name' property in >>>>> qup common driver. >>>>> - Update commit log. >>>>> >>>>> v1 Link: https://lore.kernel.org/linux-kernel/20241204150326.1470749-4-quic_vdadhani@xxxxxxxxxxx/ >>>>> --- >>>>> --- >>>>> .../devicetree/bindings/serial/qcom,serial-geni-qcom.yaml | 8 ++++++++ >>>>> 1 file changed, 8 insertions(+) >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml >>>>> index dd33794b3534..383773b32e47 100644 >>>>> --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml >>>>> +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml >>>>> @@ -56,6 +56,13 @@ properties: >>>>> reg: >>>>> maxItems: 1 >>>>> >>>>> + qcom,xfer-mode: >>>>> + description: Set the value to 1 for non-GPI (FIFO/CPU DMA) mode and 3 for GPI DMA mode. >>>>> + The default mode is FIFO. >>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>> + enum: [1, 3] >>>>> + >>>>> + >>>> >>>> Just one blank line, but anyway, this property should not be in three >>>> places. Do you really expect that each of serial engines within one >>>> GeniQUP will be configured differently by TZ? >>> >>> Yes, each SE is configured separately and it's quite frequent when >>> different SEs have different DMA configuration. >> >> Well, I checked at sm8550 and sm8650 and each pair of SE - which shares >> resources - has the same DMAs, so I would not call it frequent. Care to >> bring an example where same serial engines have different DMAs and >> different TZ? We do not talk about single QUP. > > Well, I don't have access to the latest sm8550 / sm8650 devcfg sources. > I checked the RB5 ones. As far as I understand out of 14 enabled SEs > only two are configured for the GSI DMA, others should use FIFO / SE > DMA. Same applies to the SM8250 MTP devices. Checking the RB1 / RB2 > setup also shows 3 out of 6 SEs being set for GSI. But they are the same serial engines. Again, we do not talk here about QUP, but serial engines. Best regards, Krzysztof
