On Sat, Jan 25, 2025 at 09:29:18AM +0530, Manikanta Mylavarapu wrote: > Interconnect cells differ between the IPQ5332 and IPQ5424. > Therefore, update the interconnect cells according to the SoC. Why do they differ? Why they cannot be the same? > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@xxxxxxxxxxx> > --- > .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > index 1230183fc0a9..fac7922d2473 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > @@ -35,8 +35,6 @@ properties: > - description: PCIE 2-lane PHY3 pipe clock source > > '#power-domain-cells': false > - '#interconnect-cells': > - const: 1 Properties are always defined top-level or in other schema. Best regards, Krzysztof
