On 2025/1/19 23:48, Tianling Shen wrote:
On 2025/1/19 19:36, Dragan Simic wrote:
On 2025-01-19 12:15, Tianling Shen wrote:
On 2025/1/19 17:54, Dragan Simic wrote:
Thanks for the patch. Please, see a comment below.
On 2025-01-19 10:11, Tianling Shen wrote:
In general the delay should be added by the PHY instead of the MAC,
and this improves network stability on some boards which seem to
need different delay.
Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1
Plus LTS")
Cc: stable@xxxxxxxxxxxxxxx # 6.6+
Signed-off-by: Tianling Shen <cnsztl@xxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts | 3 +--
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | 1 +
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi | 1 -
3 files changed, 2 insertions(+), 3 deletions(-)
diff --git
a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
index 67c246ad8b8c..ec2ce894da1f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
@@ -17,8 +17,7 @@ / {
&gmac2io {
phy-handle = <&yt8531c>;
- tx_delay = <0x19>;
- rx_delay = <0x05>;
+ phy-mode = "rgmii-id";
Shouldn't the "tx_delay" and "rx_delay" DT parameters be converted
into the "tx-internal-delay-ps" and "rx-internal-delay-ps" parameters,
respectively, so the Motorcomm PHY driver can pick them up and
actually configure the internal PHY delays?
The documentation[1] says "{t,r}x-internal-delay-ps" default to 1950
and that value already works fine on my board.
1. https://www.kernel.org/doc/Documentation/devicetree/bindings/net/
motorcomm%2Cyt8xxx.yaml
I see, but those values differ from the values found in the
"tx_delay" and "rx_delay" DT parameters, so I think this patch
should be tested with at least one more Orange Pi R1 Plus LTS
board, to make sure it's all still fine.
This patch has been tested on 2 boards, and we will do more tests in
next week.
Managed to test on another board and looks so far so good.
(Working network connection, no packet drop)
Thanks,
Tianling.
Thanks,
Tianling.
status = "okay";
mdio {
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
index 324a8e951f7e..846b931e16d2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
@@ -15,6 +15,7 @@ / {
&gmac2io {
phy-handle = <&rtl8211e>;
+ phy-mode = "rgmii";
tx_delay = <0x24>;
rx_delay = <0x18>;
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi
index 4f193704e5dc..09508e324a28 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi
@@ -109,7 +109,6 @@ &gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
clock_in_out = "input";
- phy-mode = "rgmii";
phy-supply = <&vcc_io>;
pinctrl-0 = <&rgmiim1_pins>;
pinctrl-names = "default";