On 1/16/25 14:35, Ninad Palsule wrote:
- Mark following GPIO lines as input high:
- GPIOL4 (reset PCH registers)
- GPIOL5 (reset portition of intel ME)
- Mark isolate errors from cpu1 gpio (GPIOO6) as active low output.
- The fan controller reset line should be active high.
Reviewed-by: Eddie James <eajames@xxxxxxxxxxxxx>
Signed-off-by: Ninad Palsule <ninad@xxxxxxxxxxxxx>
---
.../dts/aspeed/aspeed-bmc-ibm-system1.dts | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts
index 089a8315753a..9abbad07c751 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts
@@ -383,6 +383,34 @@ &gpio0 {
/*X0-X7*/ "fpga-pgood","power-chassis-good","pch-pgood","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","";
+
+ pin-gpio-hog-0 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "RST_RTCRST_N";
+ };
+
+ pin-gpio-hog-1 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "RST_SRTCRST_N";
+ };
+
+ pin-gpio-hog-2 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "BMC_FAN_E3_SVC_PEX_INT_N";
+ };
+
+ pin-gpio-hog-3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(O, 6) GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "isolate_errs_cpu1";
+ };
};
&emmc_controller {
