On 2025/1/20 10:42, Inochi Amaoto wrote:
On Wed, Jan 15, 2025 at 02:33:23PM +0800, Chen Wang wrote:
[......]
+ reg:
+ items:
+ - description: msi doorbell address
+ - description: clear register
+
+ reg-names:
+ items:
+ - const: doorbell
+ - const: clr
please reverse the items order, the clr addr is more suitable
as the MMIO device address when writing device node. doorbeel
address is just a IO address and can not be seen from CPU.
I find dtbcheck will report error if order is switched.
On SG2042, address of doorbell is ahead of clr.
+
+ msi-controller: true
+
+ msi-ranges:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - msi-controller
+ - msi-ranges
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ msi-controller@30000000 {
+ compatible = "sophgo,sg2042-msi";
+ reg = <0x30000000 0x4>, <0x30000008 0x4>;
+ reg-names = "doorbell", "clr";
+ msi-controller;
+ msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>;
+ interrupt-parent = <&plic>;
+ };
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/linux-riscv
