Populate the GPIO node in the device tree for SpacemiT K1 SoC. Each of 32 pins will act as one port and map to the pinctrl controller. Signed-off-by: Yixun Lan <dlan@xxxxxxxxxx> --- arch/riscv/boot/dts/spacemit/k1.dtsi | 55 ++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index c670ebf8fa12917aa6493fcd89fdd1409529538b..005f24b95d9ddae686dda07932d0086379cff219 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -404,6 +404,61 @@ uart9: serial@d4017800 { status = "disabled"; }; + gpio: gpio@d4019000 { + compatible = "spacemit,k1-gpio"; + reg = <0x0 0xd4019000 0x0 0x800>; + #address-cells = <1>; + #size-cells = <0>; + + port0: gpio-port@0 { + compatible = "spacemit,k1-gpio-port"; + reg = <0x0>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <58>; + interrupt-parent = <&plic>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; + }; + + port1: gpio-port@4 { + compatible = "spacemit,k1-gpio-port"; + reg = <0x4>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <58>; + interrupt-parent = <&plic>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 32 32>; + }; + + port2: gpio-port@8 { + compatible = "spacemit,k1-gpio-port"; + reg = <0x8>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <58>; + interrupt-parent = <&plic>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 64 32>; + }; + + port3: gpio-port@100 { + compatible = "spacemit,k1-gpio-port"; + reg = <0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <58>; + interrupt-parent = <&plic>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 96 32>; + }; + }; + pinctrl: pinctrl@d401e000 { compatible = "spacemit,k1-pinctrl"; reg = <0x0 0xd401e000 0x0 0x400>; -- 2.48.0