Re: [PATCH v2 1/6] dt-bindings: clock: add clock and reset definitions for Ralink SoCs

Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> · Mon, 20 Jan 2025 09:46:12 +0100

On Mon, Jan 20, 2025 at 8:45 AM Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote:
>
> On Sun, Jan 19, 2025 at 04:44:42PM +0100, Sergio Paracuellos wrote:
> > +#endif /* _DT_BINDINGS_CLK_MTMIPS_H */
> > diff --git a/include/dt-bindings/reset/mediatek,mtmips-sysc.h b/include/dt-bindings/reset/mediatek,mtmips-sysc.h
> > new file mode 100644
> > index 000000000000..1bc6024b1f22
> > --- /dev/null
> > +++ b/include/dt-bindings/reset/mediatek,mtmips-sysc.h
> > @@ -0,0 +1,152 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> > +/*
> > + * Author: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_RST_MTMIPS_H
> > +#define _DT_BINDINGS_RST_MTMIPS_H
> > +
> > +/* Ralink RT-2880 resets */
> > +
> > +#define RT2880_RST_SYS               0
> > +#define RT2880_RST_I2C               9
> > +#define RT2880_RST_FE                18
>
> These do not look correct. I understood from previous discussions that
> driver relies on these for its internal operation. It looks true for
> clocks, but does not look true here at all. This is register bit passed
> to the hardware (and I explicitly mentioned last time: that I expect
> these not being register bits passed to hardware).

I thought you were referring to reg addresses and interrupts since
there was no comment in the reset part in v1. Anyway, it is clear now,
thanks.

>
> None of the resets are bindings - these are just hardware constants.

Understood. Will drop this file and update dts.

>
> Best regards,
> Krzysztof

Thanks,
    Sergio Paracuellos