On 2025/1/15 10:30, Chukun Pan wrote: > Hi, >> [1] https://github.com/photonicat/rockchip_rk3568_kernel/blob/novotech-5.10/arch/arm64/boot/dts/rockchip/rk3568-photonicat-base.dtsi > > I don't think this link has reference value. I was misled > by this several times when I wrote dts before. It really helped me, I wrote first dts with reference to it and other devices in mainline. Could there be a better reference link here? > >> +&pcie3x2 { >> + max-link-speed = <1>; >> + num-lanes = <1>; > > I'm not sure about this. > This PCIe3.0 x2 is not split. In the schematics for that slot I saw that it only has a PCIe3.0 x1 connected. I think maybe max-link-speed = <1> is wrong. Now modify it to the following, it should look correct? /* M.2 E-Key for PCIe WLAN */ &pcie3x2 { max-link-speed = <3>; num-lanes = <1>; pinctrl-names = "default"; pinctrl-0 = <&pcie30x1m0_pins>; reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; }; > >> +&sdmmc1 { >> ... >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; > > pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>; I will correct it. > >> + wifi: wifi@1 { >> + reg = <1>; > > No aliases needed. I will remove it. > Other parts LGTM. > Thanks for your review, I will fix all problems in next version! Best regards, Junhao
