Dne ponedeljek, 11. november 2024 ob 01:57:44 Srednjeevropski standardni čas je Andre Przywara napisal(a): > For some Allwinner SoCs we have one pinctrl driver caring for multiple > very similar chips, and are tagging certain pins with a variant bitmask. > The Allwinner D1 introduced a slightly extended register layout, and we > were abusing this variant mask to convey this bit of information into > the common code part. > Now there will be more pinctrl device properties to consider (has PortF > voltage switch, for instance), so shoehorning this into the variant > bitmask will not fly anymore. > > Refactor the "variant" field into a more generic "flags" field. It turns > out that we don't need the variant bits to be unique across all SoCs, > but only among those SoCs that share one driver (table), of which there > are at most three variants at the moment. So the actual variant field can > be limited to say 8 bits, and the other bits in the flag register can be > re-purposed to hold other information, like this extended register > layout. > As a side effect we can move the variant definition into the per-SoC > pinctrl driver file, which makes it more obvious that this is just a > private definition, only relevant for this particular table. > This also changes the artificial sun20i-d1 "variant" into the actual > flag bit that we are after. > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> That looks pretty neat cleanup. Reviewed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx> Best regards, Jernej
