As discussed in patches 1 and FIXME, this device really has two SPI busses. Split the existing "merged" bus in twain, and add support for GPIO chipselects. This series depends on [1, 2]. [1] https://lore.kernel.org/linux-spi/20250116224130.2684544-1-sean.anderson@xxxxxxxxx/T/#t [2] https://lore.kernel.org/linux-spi/20250116225521.2688224-1-sean.anderson@xxxxxxxxx/T/#t Sean Anderson (7): dt-bindings: spi: zynqmp-qspi: Split the bus spi: zynqmp-gqspi: Pass speed/mode directly to config_op spi: zynqmp-gqspi: Configure SPI mode dynamically spi: zynqmp-gqspi: Refactor out controller initialization spi: zynqmp-gqspi: Split the bus spi: zynqmp-gqspi: Support GPIO chip selects ARM64: xilinx: zynqmp: Convert to split QSPI bus .../bindings/spi/spi-zynqmp-qspi.yaml | 43 ++- .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 5 +- .../boot/dts/xilinx/zynqmp-zc1232-revA.dts | 5 +- .../boot/dts/xilinx/zynqmp-zc1254-revA.dts | 5 +- .../dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 5 +- .../dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 5 +- .../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 5 +- .../boot/dts/xilinx/zynqmp-zcu104-revA.dts | 5 +- .../boot/dts/xilinx/zynqmp-zcu104-revC.dts | 5 +- .../boot/dts/xilinx/zynqmp-zcu106-revA.dts | 5 +- .../boot/dts/xilinx/zynqmp-zcu111-revA.dts | 5 +- .../boot/dts/xilinx/zynqmp-zcu1275-revA.dts | 5 +- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 15 +- drivers/spi/spi-zynqmp-gqspi.c | 328 ++++++++++++++---- 14 files changed, 359 insertions(+), 82 deletions(-) -- 2.35.1.1320.gc452695387.dirty
