pon., 6 sty 2025 o 20:55 Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx> napisał(a):
>
> On Sun, Jan 05, 2025 at 04:55:42PM -0800, Rob Clark wrote:
> > fwiw, I did see some perf boost (was mainly looking at gfxbench aztec
> > ruins vk high/normal, and also a separate mesa MR that fixes some LRZ
> > issues with turnip, so I don't remember how much boost was related to
> > which offhand).. I've not seen corruption yet (gnome-shell / f41),
> > although what you describe sounds cache-line(ish) and could be just
> > timing related. You could limit max freq via
> > /sys/devices/platform/soc@0/3d00000.gpu/devfreq/3d00000.gpu/max_freq
> > and see if that "fixes" things. I don't really expect this patchset
> > to introduce these sorts of issues, but maybe the increased freq
> > exposes some preexisting conditions?
>
> Actually, ACD related issues may show up as weird glitches in HW because
> of HW spec violation. These issues are very very rare in production
> devices though. And the behavior may vary between devices due to silicon
> variations.
>
> @Maya, thanks for testing this series. Sorry, one of my patch is buggy.
> Could you please apply the below diff and check once?
>
> --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> @@ -725,7 +725,7 @@ static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu)
> }
>
> /* Send ACD table to GMU */
> - ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, &msg, sizeof(msg), NULL, 0);
> + ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, acd_table, sizeof(*acd_table), NULL, 0);
> if (ret) {
> DRM_DEV_ERROR(gmu->dev, "Unable to ACD table (%d)\n", ret);
> return ret;
>
> --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> @@ -109,7 +109,7 @@ static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,
>
> /* Wait for a response */
> ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val,
> - val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 5000);
> + val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 1000000);
>
> if (ret) {
> DRM_DEV_ERROR(gmu->dev,
>
With this change on top of this patch series I'm seeing an increase in
vkmark scores roughly in line with increased frequency.
>
> -Akhil
> >
> > BR,
> > -R
> >
> > On Sun, Jan 5, 2025 at 9:56 AM Maya Matuszczyk <maccraft123mc@xxxxxxxxx> wrote:
> > >
> > > Hi,
> > > I've applied this series for testing, and I've no performance
> > > increase, and some screen corruption, there's some lines(mostly white)
> > > on my yoga slim 7x that appear on the bottom of the screen. When I
> > > move my cursor in swaywm over it, the lines get occluded by the cursor
> > > and screenshots don't show these lines.
> > >
> > > Best Regards,
> > > Maya Matuszczyk
> > >
> > > pon., 30 gru 2024 o 22:11 Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx> napisał(a):
> > > >
> > > > This series adds support for ACD feature for Adreno GPU which helps to
> > > > lower the power consumption on GX rail and also sometimes is a requirement
> > > > to enable higher GPU frequencies. At high level, following are the
> > > > sequences required for ACD feature:
> > > > 1. Identify the ACD level data for each regulator corner
> > > > 2. Send a message to AOSS to switch voltage plan
> > > > 3. Send a table with ACD level information to GMU during every
> > > > gpu wake up
> > > >
> > > > For (1), it is better to keep ACD level data in devicetree because this
> > > > value depends on the process node, voltage margins etc which are
> > > > chipset specific. For instance, same GPU HW IP on a different chipset
> > > > would have a different set of values. So, a new schema which extends
> > > > opp-v2 is created to add a new property called "qcom,opp-acd-level".
> > > >
> > > > ACD support is dynamically detected based on the presence of
> > > > "qcom,opp-acd-level" property in GPU's opp table. Also, qmp node should be
> > > > present under GMU node in devicetree for communication with AOSS.
> > > >
> > > > The devicetree patch in this series adds the acd-level data for X1-85
> > > > GPU present in Snapdragon X1 Elite chipset.
> > > >
> > > > The last two devicetree patches are for Bjorn and all the rest for
> > > > Rob Clark.
> > > >
> > > > ---
> > > > Changes in v3:
> > > > - Rebased on top of v6.13-rc4 since X1E doesn't boot properly with msm-next
> > > > - Update patternProperties regex (Krzysztof)
> > > > - Update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml
> > > > - Update the new dt properties' description
> > > > - Do not move qmp_get() to acd probe (Konrad)
> > > > - New patches: patch#2, #3 and #6
> > > > - Link to v2: https://lore.kernel.org/r/20241021-gpu-acd-v2-0-9c25a62803bc@xxxxxxxxxxx
> > > >
> > > > Changes in v2:
> > > > - Removed RFC tag for the series
> > > > - Improve documentation for the new dt bindings (Krzysztof)
> > > > - Add fallback compatible string for opp-table (Krzysztof)
> > > > - Link to v1: https://lore.kernel.org/r/20241012-gpu-acd-v1-0-1e5e91aa95b6@xxxxxxxxxxx
> > > >
> > > > ---
> > > > Akhil P Oommen (6):
> > > > drm/msm/adreno: Add support for ACD
> > > > drm/msm: a6x: Rework qmp_get() error handling
> > > > drm/msm/adreno: Add module param to disable ACD
> > > > dt-bindings: opp: Add v2-qcom-adreno vendor bindings
> > > > arm64: dts: qcom: x1e80100: Add ACD levels for GPU
> > > > arm64: dts: qcom: x1e80100: Add OPPs up to Turbo L3 for GPU
> > > >
> > > > .../bindings/opp/opp-v2-qcom-adreno.yaml | 97 ++++++++++++++++++++++
> > > > MAINTAINERS | 1 +
> > > > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 25 +++++-
> > > > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 96 ++++++++++++++++++---
> > > > drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 1 +
> > > > drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 36 ++++++++
> > > > drivers/gpu/drm/msm/adreno/a6xx_hfi.h | 21 +++++
> > > > drivers/gpu/drm/msm/adreno/adreno_device.c | 4 +
> > > > 8 files changed, 268 insertions(+), 13 deletions(-)
> > > > ---
> > > > base-commit: dbfac60febfa806abb2d384cb6441e77335d2799
> > > > change-id: 20240724-gpu-acd-6c1dc5dcf516
> > > >
> > > > Best regards,
> > > > --
> > > > Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx>
> > > >
> > > >
