On 07/01/2025 09:49, niravkumar.l.rabara@xxxxxxxxx wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
>
> Cadence nand controller driver requires clock-names = "nf_clk" property.
>
Fixes tag.
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 51c6e19e40b8..4357572e96e3 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -272,6 +272,7 @@ nand: nand-controller@10b80000 {
> interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
> cdns,board-delay-ps = <4830>;
> + clock-names = "nf_clk";
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Maybe you need to update your dtschema and yamllint. Don't rely on
distro packages for dtschema and be sure you are using the latest
released dtschema.
Best regards,
Krzysztof
