Please ignore this patch email - it is a duplicate. Sent by mistake.
> -----Original Message-----
> From: Rabara, Niravkumar L <niravkumar.l.rabara@xxxxxxxxx>
> Sent: Tuesday, 7 January, 2025 4:49 PM
> To: Dinh Nguyen <dinguyen@xxxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>;
> Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley
> <conor+dt@xxxxxxxxxx>; Rabara, Niravkumar L
> <niravkumar.l.rabara@xxxxxxxxx>; devicetree@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx
> Subject: [PATCH] arm64: dts: socfpga: agilex5: add NAND board file
>
> From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
>
> The Agilex5 devkit supports a separate NAND daughter card.
> The NAND daughter card replaces the SDMMC slot that is on the default
> daughter card thus requires a separate board dts file.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> ---
> arch/arm64/boot/dts/intel/Makefile | 1 +
> .../dts/intel/socfpga_agilex5_socdk_nand.dts | 89 +++++++++++++++++++
> 2 files changed, 90 insertions(+)
> create mode 100644
> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
>
> diff --git a/arch/arm64/boot/dts/intel/Makefile
> b/arch/arm64/boot/dts/intel/Makefile
> index d39cfb723f5b..33f6d01266b1 100644
> --- a/arch/arm64/boot/dts/intel/Makefile
> +++ b/arch/arm64/boot/dts/intel/Makefile
> @@ -3,5 +3,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) +=
> socfpga_agilex_n6000.dtb \
> socfpga_agilex_socdk.dtb \
> socfpga_agilex_socdk_nand.dtb \
> socfpga_agilex5_socdk.dtb \
> + socfpga_agilex5_socdk_nand.dtb \
> socfpga_n5x_socdk.dtb
> dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb diff --git
> a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> new file mode 100644
> index 000000000000..3eeae5c4e24a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> @@ -0,0 +1,89 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2025, Altera Corporation */ #include
> +"socfpga_agilex5.dtsi"
> +
> +/ {
> + model = "SoCFPGA Agilex5 SoCDK";
> + compatible = "intel,socfpga-agilex5-socdk", "intel,socfpga-agilex5";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + led0 {
> + label = "hps_led0";
> + gpios = <&porta 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led1 {
> + label = "hps_led1";
> + gpios = <&porta 7 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + /* We expect the bootloader to fill in the reg */
> + reg = <0x0 0x80000000 0x0 0x0>;
> + };
> +};
> +
> +&gpio0 {
> + status = "okay";
> +};
> +
> +&gpio1 {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i3c0 {
> + status = "okay";
> +};
> +
> +&i3c1 {
> + status = "okay";
> +};
> +
> +&osc1 {
> + clock-frequency = <25000000>;
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&watchdog0 {
> + status = "okay";
> +};
> +
> +&nand {
> + status = "okay";
> +
> + flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + nand-bus-width = <8>;
> +
> + partition@0 {
> + label = "u-boot";
> + reg = <0 0x200000>;
> + };
> + partition@200000 {
> + label = "root";
> + reg = <0x200000 0xffe00000>;
> + };
> + };
> +};
> --
> 2.25.1
