On Mon, Jan 06, 2025 at 11:03:57AM +0530, Shubhrajyoti Datta wrote:
> +description:
> + The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5
> + compact and extended memory interfaces. Versal NET DDR memory controller
> + has an optional ECC support which correct single bit ECC errors and detect
> + double bit ECC errors. It also has support for reporting other errors like
> + MMCM (Mixed-Mode Clock Manager) errors and General software errors.
> +
> +properties:
> + compatible:
> + const: amd,versal-net-ddrmc5
git grep amd,versal-net - 0 results
Where is your soc?
> +
> + amd,rproc:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + phandle to the remoteproc_r5 rproc node using which APU interacts
> + with remote processor. APU primarily communicates with the RPU for
> + accessing the DDRMC address space and getting error notification.
> +
> +required:
> + - compatible
> + - amd,rproc
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + memory-controller {
> + compatible = "amd,versal-net-ddrmc5";
Still wrong indentation. I commented on wrong alignment so that's on
me. Use 4 spaces for example indentation. (or 2 spaces, but not three...
there are no bindings like that).
