On Tue, 2024-11-26 at 09:51 +0100, AngeloGioacchino Del Regno wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > Il 26/11/24 03:58, Chunfeng Yun ha scritto: > > Add a property to tune usb2 phy's disconnect threshold. > > And add a compatible for mt8196. > > > > Is this a board-specific property? If so, can you please describe the > reason? No, it's a common property, all SoC with xsphy controller can use it. Thanks > > Thanks, > Angelo > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@xxxxxxxxxxxx> > > --- > > Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml | 8 > > ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > index a9e3139fd421..2e012d5e1da1 100644 > > --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > @@ -49,6 +49,7 @@ properties: > > - enum: > > - mediatek,mt3611-xsphy > > - mediatek,mt3612-xsphy > > + - mediatek,mt8196-xsphy > > - const: mediatek,xsphy > > > > reg: > > @@ -129,6 +130,13 @@ patternProperties: > > minimum: 1 > > maximum: 7 > > > > + mediatek,discth: > > + description: > > + The selection of disconnect threshold (U2 phy) > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + minimum: 1 > > + maximum: 15 > > + > > mediatek,efuse-intr: > > description: > > The selection of Internal Resistor (U2/U3 phy) > > >
