On 1/5/25 13:16, Igor Belwon wrote:
> These nodes were sorted by name, but it's nice to have the same class of
> devices together. As such, drop the pmu suffix and add "pmu" as a prefix.
> This keeps consistency between other Exynos SoCs too.
Well, most SoC device trees still have it as a suffix. Perhaps it'd be better to
apply this change for all exynos device trees instead of waiting for other
people to apply it separately?
Best regards,
Ivaylo
>
> Signed-off-by: Igor Belwon <igor.belwon@xxxxxxxxxxxxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/exynos/exynos990.dtsi | 62 +++++++++++++++----------------
> 1 file changed, 31 insertions(+), 31 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
> index 9d017dbed9523e874891f13258d331c3e829ca03..fc2c5049d764c3f50be7337bc777bb9561f88790 100644
> --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
> @@ -25,37 +25,6 @@ aliases {
> pinctrl6 = &pinctrl_vts;
> };
>
> - arm-a55-pmu {
> - compatible = "arm,cortex-a55-pmu";
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> -
> - interrupt-affinity = <&cpu0>,
> - <&cpu1>,
> - <&cpu2>,
> - <&cpu3>;
> - };
> -
> - arm-a76-pmu {
> - compatible = "arm,cortex-a76-pmu";
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> -
> - interrupt-affinity = <&cpu4>,
> - <&cpu5>;
> - };
> -
> - mongoose-m5-pmu {
> - compatible = "samsung,mongoose-pmu";
> - interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> -
> - interrupt-affinity = <&cpu6>,
> - <&cpu7>;
> - };
> -
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -163,6 +132,37 @@ oscclk: clock-osc {
> clock-output-names = "oscclk";
> };
>
> + pmu-a55 {
> + compatible = "arm,cortex-a55-pmu";
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-affinity = <&cpu0>,
> + <&cpu1>,
> + <&cpu2>,
> + <&cpu3>;
> + };
> +
> + pmu-a76 {
> + compatible = "arm,cortex-a76-pmu";
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-affinity = <&cpu4>,
> + <&cpu5>;
> + };
> +
> + pmu-mongoose-m5 {
> + compatible = "samsung,mongoose-pmu";
> + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-affinity = <&cpu6>,
> + <&cpu7>;
> + };
> +
> psci {
> compatible = "arm,psci-0.2";
> method = "hvc";
>
> ---
> base-commit: 7c19e0e190aebd1c879a3913f1a8855a88d73a2a
> change-id: 20250105-pmu-sorting-ec6954b6b659
>
> Best regards,
