Hi Krzysztof, Thanks for the review. >-----Original Message----- >From: Krzysztof Kozlowski <krzk@xxxxxxxxxx> >Sent: Thursday, January 2, 2025 11:56 PM >To: Visavalia, Rohit <rohit.visavalia@xxxxxxx>; mturquette@xxxxxxxxxxxx; >sboyd@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx >Cc: linux-clk@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux- >kernel@xxxxxxxxxxxxxxx >Subject: Re: [PATCH 2/3] dt-bindings: clock: xilinx: Convert VCU bindings to >dtschema > >On 02/01/2025 17:36, Rohit Visavalia wrote: >> Convert AMD (Xilinx) VCU bindings to yaml format. >> > > >... > >> + >> +properties: >> + compatible: >> + items: >> + - enum: >> + - xlnx,vcu >> + - xlnx,vcu-logicoreip-1.0 >> + >> + reg: >> + description: >> + The base offset and size of the VCU_PL_SLCR register space. > >Drop description, redundant. I will take care in v2 patch series. > >> + minItems: 1 > >There is no code like this. maxItems instead. Please use example-schema or other >recently reviewed bindings as starting point. I will update in v2 patch. >> + >> + clocks: >> + description: List of clock specifiers > >Drop description. I will remove in v2 patch series. > >> + items: >> + - description: pll ref clocksource >> + - description: aclk > >Original binding said different order. Mention change in commit msg with >explanation why. I will update commit msg in v2 patch. > >Best regards, >Krzysztof Thanks Rohit
