On Thu, Jan 02, 2025 at 07:23:10PM +0530, Siddharth Vadapalli wrote: > On Wed, Dec 04, 2024 at 12:05:26PM +0100, Enric Balletbo i Serra wrote: > > From: Dasnavis Sabiya <sabiya.d@xxxxxx> > > > > AM69 SK board has two stacked USB3 connectors: > > 1. USB3 (Stacked TypeA + TypeC) > > 2. USB3 TypeA Hub interfaced through TUSB8041. > > > > The board uses SERDES0 Lane 3 for USB3 IP. So update the > > SerDes lane info for PCIe and USB. Add the pin mux data > > nitpick: s/SerDes/SERDES to keep it consistent with the convention > followed at all other places. > > > and enable USB 3.0 support with its respective SERDES settings. > > > > Signed-off-by: Dasnavis Sabiya <sabiya.d@xxxxxx> > > Signed-off-by: Enric Balletbo i Serra <eballetb@xxxxxxxxxx> > > Reviewed-by: Siddharth Vadapalli <s-vadapalli@xxxxxx> I failed to notice it, but Roger's comment on the v1 patch at: https://lore.kernel.org/all/5af2e2fa-3f60-419e-be3e-74771a993de6@xxxxxxxxxx/ hasn't been addressed in this patch. J784S4_IOPAD(0x0EC, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */ should be J784S4_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */ Please fix this. Regards, Siddharth.
