Add system controller node to RZ/G3E (R9A09G047) SoC DTSI.
Signed-off-by: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index b73daf43683f..e87521cf9a0b 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -162,6 +162,13 @@ cpg: clock-controller@10420000 {
#power-domain-cells = <0>;
};
+ sys: system-controller@10430000 {
+ compatible = "renesas,r9a09g047-sys";
+ reg = <0 0x10430000 0 0x10000>;
+ clocks = <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>;
+ resets = <&cpg 0x30>;
+ };
+
ostm0: timer@11800000 {
compatible = "renesas,r9a09g047-ostm", "renesas,ostm";
reg = <0x0 0x11800000 0x0 0x1000>;
--
2.25.1
