On 12/22/24 16:52, Krzysztof Kozlowski wrote:
> Nodes should be sorted by name but it is also nice to have same class of
> devices together, so rename both PMU nodes (A53 and M2) to use "pmu"
> prefix, instead of suffix.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>
> ---
>
> I know we have everywhere else in pure-ARM designs nodes "arm-xxx-pmu",
> but this is too trivial and unimportant to change. I however want to
> avoid copying unsorted-style code to new patches.
Looks good to me. I'll make sure to inform other people too, considering
we should have at least 3 SoCs lined up for Q1 2025.
Best regards,
Ivo
> ---
> arch/arm64/boot/dts/exynos/exynos8895.dtsi | 48 +++++++++++-----------
> 1 file changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
> index 90b318b2f08a..d31d74cc4580 100644
> --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
> @@ -26,30 +26,6 @@ aliases {
> pinctrl7 = &pinctrl_peric1;
> };
>
> - arm-a53-pmu {
> - compatible = "arm,cortex-a53-pmu";
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-affinity = <&cpu0>,
> - <&cpu1>,
> - <&cpu2>,
> - <&cpu3>;
> - };
> -
> - mongoose-m2-pmu {
> - compatible = "samsung,mongoose-pmu";
> - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-affinity = <&cpu4>,
> - <&cpu5>,
> - <&cpu6>,
> - <&cpu7>;
> - };
> -
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -149,6 +125,30 @@ oscclk: osc-clock {
> clock-output-names = "oscclk";
> };
>
> + pmu-a53 {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-affinity = <&cpu0>,
> + <&cpu1>,
> + <&cpu2>,
> + <&cpu3>;
> + };
> +
> + pmu-mongoose-m2 {
> + compatible = "samsung,mongoose-pmu";
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-affinity = <&cpu4>,
> + <&cpu5>,
> + <&cpu6>,
> + <&cpu7>;
> + };
> +
> psci {
> compatible = "arm,psci";
> method = "smc";
