On Wed, Dec 25, 2024 at 1:33 AM Yixun Lan <dlan@xxxxxxxxxx> wrote: > The GPIO controller of K1 support basic functions as input/output, > all pins can be used as interrupt which route to one IRQ line, > trigger type can be select between rising edge, failing edge, or both. > There are four GPIO banks, each consisting of 32 pins. (...) > +description: > + The controller's registers are organized as sets of eight 32-bit > + registers with each set controlling a bank of up to 32 pins. A single > + interrupt is shared for all of the banks handled by the controller. I looked at the driver and came to the conclusion that it's better to use 4 different instances of the chip, one for each set of 32bit registers, so these 4 GPIO controllers are instantiated separately. The operating system can handle the shared interrupt, there is no need to use a single device instance just because the interrupt is shared. DT bindings are operating system neutral, but for example in Linux (if we pretend this is just one possible example) then a driver handling a shared IRQ can be requested with the flag IRQF_SHARED and the driver can just return IRQ_HANDLED if it handled an IRQ or IRQ_NONE if it didn't handle the irq (so other instances can handle it). Yours, Linus Walleij
