Re: [PATCH 2/4] clk: fsl-sai: Add i.MX8M Mini support with 8 byte register offset

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Subject: Re: [PATCH 2/4] clk: fsl-sai: Add i.MX8M Mini support with 8 byte register offset
From: Marek Vasut <marex@xxxxxxx>
Date: Thu, 26 Dec 2024 17:20:55 +0100
Cc: Conor Dooley <conor+dt@xxxxxxxxxx>, Fabio Estevam <festevam@xxxxxxxxx>, Jaroslav Kysela <perex@xxxxxxxx>, Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>, Liam Girdwood <lgirdwood@xxxxxxxxx>, Mark Brown <broonie@xxxxxxxxxx>, Michael Turquette <mturquette@xxxxxxxxxxxx>, Michael Walle <michael@xxxxxxxx>, Nicolin Chen <nicoleotsuka@xxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>, Shengjiu Wang <shengjiu.wang@xxxxxxxxx>, Stephen Boyd <sboyd@xxxxxxxxxx>, Takashi Iwai <tiwai@xxxxxxxx>, Xiubo Li <Xiubo.Lee@xxxxxxxxx>, devicetree@xxxxxxxxxxxxxxx, linux-sound@xxxxxxxxxxxxxxx
In-reply-to: <20241226153155.36351-2-marex@denx.de>
User-agent: Mozilla Thunderbird

On 12/26/24 4:30 PM, Marek Vasut wrote:

The i.MX8M Mini/Nano/Plus variant of the SAI IP has control registers
shifted by +8 bytes, add support for the i.MX8M Mini variant of the IP
with this register shift.

Ugh, V2 with updated commit message is coming.

References:
- [PATCH 1/4] dt-bindings: clock: fsl-sai: Document i.MX8M support
  - From: Marek Vasut
- [PATCH 2/4] clk: fsl-sai: Add i.MX8M Mini support with 8 byte register offset
  - From: Marek Vasut

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