Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@xxxxxxxxxxx> --- Changes in v3: - Wrap the lengthy lines - Reduced the patch series as other patch is merged. - Link to v2: https://lore.kernel.org/all/20241125111923.2218374-3-quic_yrangana@xxxxxxxxxxx/ Changes in v2: - Set the interconnect tag to QCOM_ICC_TAG_ALWAYS instead of passing 0(no TAG). - Link to v1: https://lore.kernel.org/all/20241113055830.2918347-1-quic_yrangana@xxxxxxxxxxx/ --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 73abf2ef9c9f..30c1de1c4ad2 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -736,6 +736,31 @@ ufs_mem_phy: phy@1d87000 { status = "disabled"; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0x0 0x01dc4000 0x0 0x28000>; + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + num-channels = <20>; + qcom,num-ees = <4>; + iommus = <&apps_smmu 0x480 0x00>, + <&apps_smmu 0x481 0x00>; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,qcs8300-qce", "qcom,qce"; + reg = <0x0 0x01dfa000 0x0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x480 0x00>, + <&apps_smmu 0x481 0x00>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "memory"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x20000>; -- 2.34.1
