Hello Marc,
On 2024-12-23 10:39, Marc Zyngier wrote:
On Sun, 22 Dec 2024 03:03:55 +0000,
FUKAUMI Naoki <naoki@xxxxxxxxx> wrote:
Radxa E52C is a compact network computer[1] based on the Rockchip
RK3582 SoC:
- Dual Cortex-A76 and quad Cortex-A55 CPU
So you have *two* big cores.
- 5TOPS NPU
- 2GB/4GB/8GB LPDDR4 RAM
- 16GB/32GB/64GB on-board eMMC
- microSD card slot
- USB 3.0 Type-A HOST port
- USB Type-C debug port
- USB Type-C power port (5V only)
- 2x 2.5GbE ports
[1] https://radxa.com/products/network-computer/e52c
Signed-off-by: FUKAUMI Naoki <naoki@xxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3582-radxa-e52c.dts | 729
++++++++++++++++++
2 files changed, 730 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts
[...]
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
And yet you configure 4. If your HW only has 2 A76s, surely something
should remove these cores for this platform rather than keep them
around.
Indeed, U-Boot will do that, based on the efuses that contain the
data required to determine which CPU cores (and/or clusters) are
defective and need to be marked as disabled.
Maybe we should add a comment block above the "cpu_b0" node, to
describe that a bit better. Perhaps something like this:
/*
* In the Rockchip RK3582 SoC, some CPU cores end up disabled
* and unused because they're marked in the efuses as defective.
* The disabling in the DT is performed by the boot loader.
*/
