On Mon, Dec 09, 2024 at 04:21:30PM +0800, Inochi Amaoto wrote: > The clock controller on the SG2044 provides common clock function > for all IPs on the SoC. This device requires PLL clock to function > normally. > > Add definition for the clock controller of the SG2044 SoC. > > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx> > --- > .../bindings/clock/sophgo,sg2044-clk.yaml | 40 +++++ > include/dt-bindings/clock/sophgo,sg2044-clk.h | 170 ++++++++++++++++++ > 2 files changed, 210 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml > create mode 100644 include/dt-bindings/clock/sophgo,sg2044-clk.h Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
