gs101 also requires access to the pmu interrupt generation register region. Update the exynos-pmu bindings documentation to reflect this. Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> --- .../bindings/soc/samsung/exynos-pmu.yaml | 29 +++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 6cdfe7e059a3..5ac4864e4cde 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -73,7 +73,11 @@ properties: - const: syscon reg: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reg-names: + maxItems: 2 '#clock-cells': const: 1 @@ -186,6 +190,29 @@ allOf: properties: dp-phy: false + - if: + properties: + compatible: + contains: + enum: + - google,gs101-pmu + then: + properties: + reg: + items: + - description: PMU register region + - description: PMU Interrupt Generation register region + reg-names: + items: + - const: pmu + - const: pmu-intr-gen + else: + properties: + reg: + maxItems: 1 + reg-name: + maxItems: 1 + examples: - | #include <dt-bindings/clock/exynos5250.h> -- 2.47.1.613.gc27f4b7a9f-goog