On Tue, Dec 3, 2024 at 11:50 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > Document the device tree bindings for the Renesas RZ/G3E SoC > Clock Pulse Generator (CPG). > > Also define constants for the core clocks of the RZ/G3E SoC. > > Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > --- > v1->v2: > * Added Ack from Conor Dooley. > * Fixed typo "CORE_CLK*"->"CORECLK*" to match with hardware manual. Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> i.e. will queue in a shared renesas-r9a09g047-dt-binding-defs branch. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds