On Tue, Dec 10, 2024 at 10:48:55PM +0200, Vladimir Oltean wrote: > On Mon, Dec 09, 2024 at 02:44:20PM +0100, Christian Marangi wrote: > > Document support for Airoha AN8855 5-port Gigabit Switch. > > > > It does expose the 5 Internal PHYs on the MDIO bus and each port > > can access the Switch register space by configurting the PHY page. > > typo: configuring > Also below. > > > > > Each internal PHY might require calibration with the fused EFUSE on > > the switch exposed by the Airoha AN8855 SoC NVMEM. > > This paragraph should be irrelevant to the switch binding. > > > > > Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx> > > --- > > .../net/dsa/airoha,an8855-switch.yaml | 105 ++++++++++++++++++ > > MAINTAINERS | 1 + > > 2 files changed, 106 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml b/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml > > new file mode 100644 > > index 000000000000..63bcbebd6a29 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml > > @@ -0,0 +1,105 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/dsa/airoha,an8855-switch.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Airoha AN8855 Gigabit Switch > > + > > +maintainers: > > + - Christian Marangi <ansuelsmth@xxxxxxxxx> > > + > > +description: > > > + Airoha AN8855 is a 5-port Gigabit Switch. > > + > > + It does expose the 5 Internal PHYs on the MDIO bus and each port > > + can access the Switch register space by configurting the PHY page. > > + > > + Each internal PHY might require calibration with the fused EFUSE on > > + the switch exposed by the Airoha AN8855 SoC NVMEM. > > + > > +$ref: dsa.yaml# > > + > > +properties: > > + compatible: > > + const: airoha,an8855-switch > > + > > + reset-gpios: > > + description: > > + GPIO to be used to reset the whole device > > + maxItems: 1 > > Since this affects the whole device, the SoC node (handled by the > MFD driver) should handle it. Otherwise you expose the code to weird > race conditions where one child MFD device resets the whole chip after > the other MFD children have probed, and this undoes their settings. > OK. > > + > > + airoha,ext-surge: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: > > + Calibrate the internal PHY with the calibration values stored in EFUSE > > + for the r50Ohm values. > > Doesn't seem that this pertains to the switch. Do you think this should be placed in each PHY node? I wanted to prevent having to define a schema also for PHY if possible given how integrated these are. (originally it was defined in DT node to follow how it was done in Airoha SDK) -- Ansuel
