Hi, Angelo: On Thu, 2024-12-05 at 12:45 +0100, AngeloGioacchino Del Regno wrote: > External email : Please do not click links or open attachments until you have verified the sender or the content. > > > Add support for the newer HDMI-TX (Encoder) v2 and DDC v2 IPs > found in MediaTek's MT8195, MT8188 SoC and their variants, and > including support for display modes up to 4k60 and for HDMI > Audio, as per the HDMI 2.0 spec. > > HDCP and CEC functionalities are also supported by this hardware, > but are not included in this commit and that also poses a slight > difference between the V2 and V1 controllers in how they handle > Hotplug Detection (HPD). > > While the v1 controller was using the CEC controller to check > HDMI cable connection and disconnection, in this driver the v2 > one does not. > > This is due to the fact that on parts with v2 designs, like the > MT8195 SoC, there is one CEC controller shared between the HDMI > Transmitter (HDMI-TX) and Receiver (HDMI-RX): before eventually > adding support to use the CEC HW to wake up the HDMI controllers > it is necessary to have support for one TX, one RX *and* for both > at the same time. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> > --- [snip] > +static u8 mtk_hdmi_v2_get_i2s_ch_mapping(struct mtk_hdmi *hdmi, u8 channel_type) parameter hdmi is redundant, so drop it. Regards, CK > +{ > + switch (channel_type) { > + case HDMI_AUD_CHAN_TYPE_1_1: > + case HDMI_AUD_CHAN_TYPE_2_1: > + return 0x01; > + case HDMI_AUD_CHAN_TYPE_3_0: > + return 0x02; > + case HDMI_AUD_CHAN_TYPE_3_1: > + return 0x03; > + case HDMI_AUD_CHAN_TYPE_3_0_LRS: > + case HDMI_AUD_CHAN_TYPE_4_0: > + return 0x08; > + case HDMI_AUD_CHAN_TYPE_5_1: > + return 0x0b; > + case HDMI_AUD_CHAN_TYPE_4_1_CLRS: > + case HDMI_AUD_CHAN_TYPE_6_0: > + case HDMI_AUD_CHAN_TYPE_6_0_CS: > + case HDMI_AUD_CHAN_TYPE_6_0_CH: > + case HDMI_AUD_CHAN_TYPE_6_0_OH: > + case HDMI_AUD_CHAN_TYPE_6_0_CHR: > + return 0x0e; > + case HDMI_AUD_CHAN_TYPE_1_0: > + case HDMI_AUD_CHAN_TYPE_2_0: > + case HDMI_AUD_CHAN_TYPE_3_1_LRS: > + case HDMI_AUD_CHAN_TYPE_4_1: > + case HDMI_AUD_CHAN_TYPE_5_0: > + case HDMI_AUD_CHAN_TYPE_4_0_CLRS: > + case HDMI_AUD_CHAN_TYPE_6_1: > + case HDMI_AUD_CHAN_TYPE_6_1_CS: > + case HDMI_AUD_CHAN_TYPE_6_1_CH: > + case HDMI_AUD_CHAN_TYPE_6_1_OH: > + case HDMI_AUD_CHAN_TYPE_6_1_CHR: > + case HDMI_AUD_CHAN_TYPE_7_0: > + case HDMI_AUD_CHAN_TYPE_7_0_LH_RH: > + case HDMI_AUD_CHAN_TYPE_7_0_LSR_RSR: > + case HDMI_AUD_CHAN_TYPE_7_0_LC_RC: > + case HDMI_AUD_CHAN_TYPE_7_0_LW_RW: > + case HDMI_AUD_CHAN_TYPE_7_0_LSD_RSD: > + case HDMI_AUD_CHAN_TYPE_7_0_LSS_RSS: > + case HDMI_AUD_CHAN_TYPE_7_0_LHS_RHS: > + case HDMI_AUD_CHAN_TYPE_7_0_CS_CH: > + case HDMI_AUD_CHAN_TYPE_7_0_CS_OH: > + case HDMI_AUD_CHAN_TYPE_7_0_CS_CHR: > + case HDMI_AUD_CHAN_TYPE_7_0_CH_OH: > + case HDMI_AUD_CHAN_TYPE_7_0_CH_CHR: > + case HDMI_AUD_CHAN_TYPE_7_0_OH_CHR: > + case HDMI_AUD_CHAN_TYPE_7_0_LSS_RSS_LSR_RSR: > + case HDMI_AUD_CHAN_TYPE_8_0_LH_RH_CS: > + case HDMI_AUD_CHAN_TYPE_7_1: > + case HDMI_AUD_CHAN_TYPE_7_1_LH_RH: > + case HDMI_AUD_CHAN_TYPE_7_1_LSR_RSR: > + case HDMI_AUD_CHAN_TYPE_7_1_LC_RC: > + case HDMI_AUD_CHAN_TYPE_7_1_LW_RW: > + case HDMI_AUD_CHAN_TYPE_7_1_LSD_RSD: > + case HDMI_AUD_CHAN_TYPE_7_1_LSS_RSS: > + case HDMI_AUD_CHAN_TYPE_7_1_LHS_RHS: > + case HDMI_AUD_CHAN_TYPE_7_1_CS_CH: > + case HDMI_AUD_CHAN_TYPE_7_1_CS_OH: > + case HDMI_AUD_CHAN_TYPE_7_1_CS_CHR: > + case HDMI_AUD_CHAN_TYPE_7_1_CH_OH: > + case HDMI_AUD_CHAN_TYPE_7_1_CH_CHR: > + case HDMI_AUD_CHAN_TYPE_7_1_OH_CHR: > + case HDMI_AUD_CHAN_TYPE_7_1_LSS_RSS_LSR_RSR: > + default: > + return 0; > + } > + > + return 0; > +} > +