> + /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Really? That breaks IEEE 802.3, which requires 2.5MHz. Humm, says it multiple times in the datasheet. Seems like a language lawyer was involved in the data sheet. The DP83TD510E is an ultra-low power Ethernet physical layer transceiver compliant with the IEEE 802.3cg 10Base-T1L specification I would not be surprised to find that 802.3cg says nothing about MDC, that is in the base 802.3 standard, which they don't say they are compliant to. > * Since we can't reduce > + * stmmac MDC clock without reducing system bus rate, we need to use > + * gpio based MDIO bus. > + */ At least there is a simple workaround, even if it is much slower than what you really need. Andrew
