Hi Claudiu,
On Fri, Nov 15, 2024 at 2:50 PM Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> Add DT overlay for SCIF1 (of the Renesas RZ/G3S SoC) routed through the
> PMOD1_3A interface available on the Renesas RZ SMARC Carrier II board.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod.dtso
> @@ -0,0 +1,48 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the RZ/G3S SMARC Carrier II EVK PMOD parts
So you plan to describe all 3 PMOD interfaces in a single overlay?
The board has:
1. PMOD0 - Type-2A,
2. PMOD1 - Tpye-3A,
3. PMOD1 - Type 6A.
Wouldn't it be more convenient to have separate overlays for each port,
so you can more easily use them as e.g. Type-1(A) (GPIO only)?
BTW, naming both the second and third port "PMOD1" in the schematics,
and differentiating them by their type, was definitely a bad idea.
How can you distinguish between Type-1(A) on the second or third port?
> + *
> + * Copyright (C) 2024 Renesas Electronics Corp.
> + *
> + *
> + * [Connection]
> + *
> + * SMARC Carrier II EVK
> + * +--------------------------------------------+
> + * |PMOD1_3A (PMOD1 PIN HEADER) |
> + * | SCIF1_CTS# (pin1) (pin7) PMOD1_GPIO10 |
> + * | SCIF1_TXD (pin2) (pin8) PMOD1_GPIO11 |
> + * | SCIF1_RXD (pin3) (pin9) PMOD1_GPIO12 |
> + * | SCIF1_RTS# (pin4) (pin10) PMOD1_GPIO13 |
> + * | GND (pin5) (pin11) GND |
> + * | PWR_PMOD1 (pin6) (pin12) GND |
> + * +--------------------------------------------+
This depends not only on CONFIG_SW3 (for RXD only), but also on
SW_OPT_MUX4 (SW_SER0_PMOD=L gates all 4 SCIF1 signals).
While including "rzg3s-smarc-switches.h" for (out-of-tree) overlay
configfs is not really needed, please document the switches in the
comments. As this is included in r9a08g045s33-smarc-pmod.dtb, you
may still want to include "rzg3s-smarc-switches.h".
> + *
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> +
> +&{/} {
> + aliases {
> + serial0 = "/soc/serial@1004bc00";
Note that configuring aliases doesn't work in dynamic overlays
(but we don't care in upstream).
However, this is also wired on the Carrier board to the M2 slot when
SW_SER0_PMOD is low. so I think it makes sense to have the alias
unconditionally in rzg3s-smarc.dtsi instead.
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
