Add system controller node to RZ/G3E (R9A09G047) SoC DTSI.
Signed-off-by: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index 17bc95fb111f..5f65e652a413 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -154,6 +154,13 @@ cpg: clock-controller@10420000 {
#power-domain-cells = <0>;
};
+ sys: system-controller@10430000 {
+ compatible = "renesas,r9a09g047-sys", "syscon";
+ reg = <0 0x10430000 0 0x10000>;
+ clocks = <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>;
+ resets = <&cpg 0x30>;
+ };
+
scif0: serial@11c01400 {
compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057";
reg = <0 0x11c01400 0 0x400>;
--
2.25.1
