On Thu, Dec 05, 2024 at 08:31:44PM -0800, Abhinav Kumar wrote:
> dp_display_prepare() only prepares the link in case its not
> already ready before dp_display_enable(). Hence separate it into
> its own API.
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/dp/dp_display.c | 24 +++++++++++++++++-------
> drivers/gpu/drm/msm/dp/dp_display.h | 1 +
> drivers/gpu/drm/msm/dp/dp_drm.c | 2 ++
> 3 files changed, 20 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 2f8650d60202deaa90de1a5e0dd6d8bc50f09782..02282f58f1b31594601692b406215cee4ca41032 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -1525,26 +1525,36 @@ int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev,
> return 0;
> }
>
> -void msm_dp_display_atomic_enable(struct msm_dp *dp)
> +void msm_dp_display_atomic_prepare(struct msm_dp *dp)
> {
> int rc = 0;
> -
> struct msm_dp_display_private *msm_dp_display;
>
> msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
>
> - if (dp->is_edp)
> - msm_dp_hpd_plug_handle(msm_dp_display, 0);
> -
> mutex_lock(&msm_dp_display->event_mutex);
>
> rc = msm_dp_display_prepare(msm_dp_display);
> if (rc) {
> DRM_ERROR("DP display prepare failed, rc=%d\n", rc);
> - mutex_unlock(&msm_dp_display->event_mutex);
> - return;
> }
FWIW: This patch breaks the eDP panel on the X1E80100 CRD for me. If you
don't do the msm_dp_hpd_plug_handle() before msm_dp_display_prepare(),
then the link_params (rate/num_lanes etc) are not initialized. Moving it
back here seems to fix it.
Maybe I'm missing some dependent patches or so, I was just experimenting
a bit. :-)
Thanks,
Stephan
[ 17.724076] phy phy-aec5a00.phy.15: phy poweron failed --> -22
[ 17.724698] ------------[ cut here ]------------
[ 17.724699] disp_cc_mdss_dptx3_link_clk status stuck at 'off'
[ 17.724709] WARNING: CPU: 9 PID: 705 at drivers/clk/qcom/clk-branch.c:88 clk_branch_toggle+0x124/0x16c
[ 17.724877] CPU: 9 UID: 0 PID: 705 Comm: (udev-worker) Not tainted 6.13.0-rc1 #1
[ 17.724883] pstate: 614000c5 (nZCv daIF +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
[ 17.724887] pc : clk_branch_toggle+0x124/0x16c
[ 17.724889] lr : clk_branch_toggle+0x120/0x16c
[ 17.724927] Call trace:
[ 17.724929] clk_branch_toggle+0x124/0x16c (P)
[ 17.724933] clk_branch_toggle+0x120/0x16c (L)
[ 17.724935] clk_branch2_enable+0x1c/0x28
[ 17.724938] clk_core_enable+0x78/0xb4
[ 17.724944] clk_core_enable_lock+0x88/0x118
[ 17.724947] clk_enable+0x1c/0x28
[ 17.724950] clk_bulk_enable+0x38/0xb0
[ 17.724953] msm_dp_ctrl_enable_mainlink_clocks+0x140/0x234 [msm]
[ 17.724974] msm_dp_ctrl_prepare_stream_on+0x10c/0x19c [msm]
[ 17.724985] msm_dp_display_atomic_prepare+0x9c/0x1b4 [msm]
[ 17.724994] msm_edp_bridge_atomic_enable+0x60/0x78 [msm]
[...]
[ 17.725216] ---[ end trace 0000000000000000 ]---
[ 17.725218] Failed to enable clk 'ctrl_link': -16
[ 17.725220] [drm:msm_dp_ctrl_enable_mainlink_clocks [msm]] *ERROR* Unable to start link clocks. ret=-16
[ 17.725231] [drm:msm_dp_ctrl_prepare_stream_on [msm]] *ERROR* Failed to start link clocks. ret=-16
[ 17.725240] [drm:msm_dp_display_atomic_prepare [msm]] *ERROR* DP display prepare failed, rc=-16
