On 12/5/24 17:09, Krzysztof Kozlowski wrote:
On 05/12/2024 17:07, Ken Sloat wrote:
+ 1. The mux input number/line for the request
+ 2. Bitfield representing DMA channel configuration that is passed
+ to the real DMA controller
+ 3. Bitfield representing device dependent DMA features passed to
+ the real DMA controller
+
+ For bitfield definitions of cells 2 and 3, see the associated
+ bindings doc for the actual DMA controller the mux is connected
This does not sound right. This is the binding for DMA controller, so
you are saying "please look at itself". I suggest to drop this as well.
While logically it is the DMA controller, this doc is specifically for
the mux - the DMA controller has its own driver and binding docs in
Documentation/devicetree/bindings/dma/stm32/st,stm32-dma.yaml
I can reference st,stm32-dma.yaml directly, but I was unsure if this
mux IP was used with another DMA controller from ST on a different
SoC.
What do you suggest here?
Thanks for explanation, I think it is fine.
Best regards,
Krzysztof
This description was lost when STM32 DMAMUX binding txt file was
converted to yaml:
0b7c446fa9f7 ("dt-bindings: dma: Convert stm32 DMAMUX bindings to
json-schema")
-- #dma-cells: Should be set to <3>.
- First parameter is request line number.
- Second is DMA channel configuration
- Third is Fifo threshold
- For more details about the three cells, please see
- stm32-dma.txt documentation binding file
stm32-dmamux exclusively muxes stm32-dma channels. It is not used with
other ST DMA controllers (STM32 MDMA, STM32 DMA3).
So it is fine to refer to st,stm32-dma.yaml.
Regards,
Amelie
