On Wed, Dec 04, 2024 at 10:00:41AM +0000, Russell King (Oracle) wrote: > On Wed, Dec 04, 2024 at 10:33:33AM +0100, Christian Marangi wrote: > > On Wed, Dec 04, 2024 at 09:24:45AM +0000, Russell King (Oracle) wrote: > > > > Added 5000 as this is present in documentation bits but CPU can only go > > > > up to 2.5. Should I drop it? Idea was to futureproof it since it really > > > > seems they added these bits with the intention of having a newer switch > > > > with more advanced ports. > > > > > > Is there any mention of supporting interfaces faster than 2500BASE-X ? > > > > > > > In MAC Layer function description, they say: > > - Support 10/100/1000/2500/5000 Mbps bit rates > > > > So in theory it can support up to that speed. > > Maybe the internal IP supports this but the SoC doesn't? > > However, I was asking about interfaces rather than speeds - so RGMII, > SGMII, 2500BASE-X... is there a mention of anything else? > I can see mention of 5g Base-R so I assume supported but in the sdk there isn't any code to configure it/I don't have any hardware. (and documentation is empty for anything PCS related for register, just block diagram) I can ask it that is expected to work tho. -- Ansuel