On Mon, Dec 02, 2024 at 02:57:38PM -0600, Rob Herring wrote:
> On Mon, Dec 02, 2024 at 04:45:17PM +0100, Christian Marangi wrote:
> > On Mon, Dec 02, 2024 at 04:42:33PM +0100, Ulf Hansson wrote:
> > > On Mon, 2 Dec 2024 at 16:20, Christian Marangi <ansuelsmth@xxxxxxxxx> wrote:
> > > >
> > > > Document required property for Airoha EN7581 CPUFreq .
> > > >
> > > > On newer Airoha SoC, CPU Frequency is scaled indirectly with SMCCC commands
> > > > to ATF and no clocks are exposed to the OS.
> > > >
> > > > The SoC have performance state described by ID for each OPP, for this a
> > > > Power Domain is used that sets the performance state ID according to the
> > > > required OPPs defined in the CPU OPP tables.
> > > >
> > > > Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
> > > > ---
> > > > Changes v4:
> > > > - Add this patch
> > > >
> > > > .../cpufreq/airoha,en7581-cpufreq.yaml | 259 ++++++++++++++++++
> > > > 1 file changed, 259 insertions(+)
> > > > create mode 100644 Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
> > > > new file mode 100644
> > > > index 000000000000..a5bdea7f34b5
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
> > >
> > > [...]
> > >
> > > > +examples:
> > > > + - |
> > > > + / {
> > > > + #address-cells = <2>;
> > > > + #size-cells = <2>;
> > > > +
> > > > + cpus {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > +
> > > > + cpu0: cpu@0 {
> > > > + device_type = "cpu";
> > > > + compatible = "arm,cortex-a53";
> > > > + reg = <0x0>;
> > > > + operating-points-v2 = <&cpu_opp_table>;
> > > > + enable-method = "psci";
> > > > + clocks = <&cpufreq>;
> > > > + clock-names = "cpu";
> > > > + power-domains = <&cpufreq>;
> > > > + power-domain-names = "cpu_pd";
> > >
> > > Nitpick: Perhaps clarify the name to be "perf" or "cpu_perf", to
> > > indicate it's a power-domain with performance scaling support.
> > >
> >
> > Will change to cpu_perf. Thanks a lot for the review!
>
> Is that defined in arm/cpus.yaml? No.
>
> The current choices are perf or psci though those aren't enforced (yet).
> Or nothing which is my preference if there is only 1 power domain.
>
I would also prefer not having to define the names property but I guess
that is mandatory for the PD APIs? Maybe Ulf can confirm.
--
Ansuel
