On 28/11/2024 15:14, Conor Dooley wrote:
On Thu, Nov 28, 2024 at 01:41:36PM +0000, Will Deacon wrote:
On Thu, Nov 28, 2024 at 12:56:55PM +0000, Conor Dooley wrote:
On Sun, Nov 03, 2024 at 03:51:53PM +0100, Alexandre Ghiti wrote:
In order to produce a generic kernel, a user can select
CONFIG_COMBO_SPINLOCKS which will fallback at runtime to the ticket
spinlock implementation if Zabha or Ziccrse are not present.
Note that we can't use alternatives here because the discovery of
extensions is done too late and we need to start with the qspinlock
implementation because the ticket spinlock implementation would pollute
the spinlock value, so let's use static keys.
This is largely based on Guo's work and Leonardo reviews at [1].
Link: https://lore.kernel.org/linux-riscv/20231225125847.2778638-1-guoren@xxxxxxxxxx/ [1]
Signed-off-by: Guo Ren <guoren@xxxxxxxxxx>
Signed-off-by: Alexandre Ghiti <alexghiti@xxxxxxxxxxxx>
This patch (now commit ab83647fadae2 ("riscv: Add qspinlock support"))
breaks boot on polarfire soc. It dies before outputting anything to the
console. My .config has:
# CONFIG_RISCV_TICKET_SPINLOCKS is not set
# CONFIG_RISCV_QUEUED_SPINLOCKS is not set
CONFIG_RISCV_COMBO_SPINLOCKS=y
I pointed out some of the fragility during review:
https://lore.kernel.org/all/20241111164259.GA20042@willie-the-truck/
so I'm kinda surprised it got merged tbh :/
Maybe it could be reverted rather than having a broken boot with the
default settings in -rc1.
No need to rush before we know what's happening,I guess you bisected to
this commit right?
I don't have this soc, so can you provide $stval/$sepc/$scause, a
config, a kernel, anything?
Does the polarfire soc provide Ziccrse?
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