On Sun, Nov 24, 2024 at 5:01 PM Fei Shao <fshao@xxxxxxxxxxxx> wrote:
>
> Introduce MT8188-based Chromebook Ciri, also known commercially as
> Lenovo Chromebook Duet (11", 9).
>
> Ciri is a detachable device based on the Geralt design, where Geralt is
> the codename for the MT8188 platform. Ciri offers 8 SKUs to accommodate
> different combinations of second-source components, including:
> - audio codecs (RT5682S and ES8326)
> - speaker amps (TAS2563 and MAX98390)
> - MIPI-DSI panels (BOE nv110wum-l60 and IVO t109nw41)
Of note, a couple things are not working:
- Touchscreen: missing driver for HiMax SPI HID
- Trackpad on detachable base: missing driver support in CBAS and
associated device tree node
A couple things below.
> Signed-off-by: Fei Shao <fshao@xxxxxxxxxxxx>
> ---
>
> Changes in v3:
> - drop scp_mem, scp_pins and SCP declaration per discussion in v2
> - drop unused (for now) dual-SCP reserved memory range
> - drop unused touchscreen pinctrl
> - drop unused HID-I2C touchscreen node in I2C-2
> - drop unused AP-SAR sensor node in I2C-3
> - drop trackpad node in I2C-4 (only work with downstream CBAS)
> - drop mmc1 (unused in public product)
> - drop eDP panel path (unused in public product)
> - declare DSI panel compatibles in individual board .dts files
> - declare CPU TDP target in -geralt.dtsi instead
> - move spi1 default and sleep pinctrl to -geralt.dtsi
> - leave memory@40000000 size empty (filled by bootloader)
> - consolidate audio codec/amplifier, DAI link declaration and
> audio-routing property
> - stop sourcing `arm/cros-ec-sbs.dtsi` in -geralt.dtsi, because all that
> does is to declare sbs-battery at address 0xb, which doesn't align
> with the final design at 0xf. This saves us a /delete-node/.
> - minor format fix
>
> Changes in v2:
> - remove invalid or undocumented properties
> e.g. mediatek,dai-link, maxim,dsm_param_name etc.
> - remove touchscreen as the driver is not yet accepted in upstream
> - update sound DAI link node name to match the binding
> - add missing pinctrls in audio codec nodes
>
> arch/arm64/boot/dts/mediatek/Makefile | 8 +
> .../dts/mediatek/mt8188-geralt-ciri-sku0.dts | 32 +
> .../dts/mediatek/mt8188-geralt-ciri-sku1.dts | 59 +
> .../dts/mediatek/mt8188-geralt-ciri-sku2.dts | 59 +
> .../dts/mediatek/mt8188-geralt-ciri-sku3.dts | 32 +
> .../dts/mediatek/mt8188-geralt-ciri-sku4.dts | 48 +
> .../dts/mediatek/mt8188-geralt-ciri-sku5.dts | 72 +
> .../dts/mediatek/mt8188-geralt-ciri-sku6.dts | 72 +
> .../dts/mediatek/mt8188-geralt-ciri-sku7.dts | 48 +
> .../boot/dts/mediatek/mt8188-geralt-ciri.dtsi | 316 +++++
> .../boot/dts/mediatek/mt8188-geralt.dtsi | 1156 +++++++++++++++++
> 11 files changed, 1902 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
[...]
> diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
> new file mode 100644
> index 000000000000..b6abecbcfa81
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
> @@ -0,0 +1,1156 @@
[...]
Looking at the schematic, the following two are actually a TPS65132S
on i2c3. It should be modeled as such. <&pio 3> is the enable GPIO
for both positive and negative regulators, while <&pio 4> goes to
the SYNC pin, which enables higher load on the negative side when
driven high. The latter is not supported by the driver or binding.
The TPS65132S has a different power sequence requirement compared
to the other TPS65132 variants.
> + ppvar_mipi_disp_avdd: regulator-ppvar-mipi-disp-avdd {
> + compatible = "regulator-fixed";
> + regulator-name = "ppvar_mipi_disp_avdd";
> + enable-active-high;
> + gpio = <&pio 3 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mipi_disp_avdd_en>;
> + vin-supply = <&pp5000_z1>;
> + };
> +
> + ppvar_mipi_disp_avee: regulator-ppvar-mipi-disp-avee {
> + compatible = "regulator-fixed";
> + regulator-name = "ppvar_mipi_disp_avee";
> + regulator-enable-ramp-delay = <10000>;
> + enable-active-high;
> + gpio = <&pio 4 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mipi_disp_avee_en>;
> + vin-supply = <&pp5000_z1>;
> + };
> +
[...]
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins>;
> + clock-frequency = <400000>;
> + status = "okay";
> +};
&i2c2 on Ciri is completely unused. Please re-disable it there.
ChenYu
