On 11/22/24 4:39 AM, Ying Liu wrote:
On 11/22/24, Marek Vasut wrote:
On 11/20/24 7:38 AM, Ying Liu wrote:
[...]
If the DP monitors support typical video modes like 1080p60 with
148.5MHz pixel clock rate, I assume these typical video modes work
still ok with this patch at least. Please help confirm this, since if the
alternative solution(*) doesn't stand, we would know those video
modes still work ok with my solution(fixed PLL rate).
They do not work with the fixed PLL setting.
Why? Did you assign a sensible fixed PLL rate in DT?
Whatever was in imx8mp.dtsi does not really work for all the panels.
Please keep in mind that the use case I have does not include only
1920x1080 "standard" panels, but also other resolutions.
It looks like you are still sticking to the idea of supporting all potentially
valid video modes by trying to find an "alternative" solution, while
neglecting that the solution *could be* never working.
Reconfiguring the PLL to achieve accurate pixel clock is working
already, right now.
Can you please compare clk_summary output for the failing cases
before and after this patch is applied? I assume that if you use
the fixed PLL rate same to the rate which works before this patch is
applied, the typical video modes still just work after this patch is
applied.
I'm afraid I do not need to support only typical video modes, but also
the other "atypical" modes.
If the "alternative" solution doesn't work, we'll end up using the "fixed
PLL rate" solution. It that case, some video modes would be filtered
out as a sacrifice.
Maybe it would be better to continue the discussion in
[PATCH 0/5] clk: Fix simple video pipelines on i.MX8
which seems close to the alternative solution I was looking for ?
