On 11/22/24 5:33 AM, Uwe Kleine-König wrote:
> The ad7124-4 and ad7124-8 both support 16 channel registers and assigns
> each channel defined in dt statically such a register. While the driver
> could be a bit more clever about this, it currently isn't and specifying
> more than 16 channels yields broken behaviour. So just refuse to bind in
> this situation.
The ad7124-4 datasheet I am looking at says that it only has registers
CONFIG_0 to CONFIG_7, so do we need to limit those chips to 8 channels?
>
> Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support")
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxx>
> ---
> drivers/iio/adc/ad7124.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c
> index 8d94bc2b1cac..5352b26bb391 100644
> --- a/drivers/iio/adc/ad7124.c
> +++ b/drivers/iio/adc/ad7124.c
> @@ -821,6 +821,16 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev,
> if (!st->num_channels)
> return dev_err_probe(dev, -ENODEV, "no channel children\n");
>
> + /*
> + * The driver assigns each logical channel defined in the device tree
> + * statically one channel register. So only accept 16 such logical
> + * channels to not treat CONFIG_0 (i.e. the register following
> + * CHANNEL_15) as an additional channel register. The driver could be
> + * improved to lift this limitation.
> + */
> + if (st->num_channels > AD7124_MAX_CHANNELS)
> + return dev_err_probe(dev, -EINVAL, "Too many channels defined\n");
> +
> chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels,
> sizeof(*chan), GFP_KERNEL);
> if (!chan)
