On Fri, Nov 22, 2024 at 10:33:11AM +0800, Ziyue Zhang wrote: > From: Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx> > > Add dedicated schema for the PCIe controllers found on QCS615. > Due to qcs615's clock-names do not match any of the existing > dt-bindings, a new compatible for qcs615 is needed. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx> > Signed-off-by: Ziyue Zhang <quic_ziyuzhan@xxxxxxxxxxx> > --- > .../bindings/pci/qcom,pcie-qcs615.yaml | 161 ++++++++++++++++++ > 1 file changed, 161 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-qcs615.yaml I propose qcom,qcs615-pcie > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-qcs615.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-qcs615.yaml > new file mode 100644 > index 000000000000..8f7571538d23 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-qcs615.yaml > @@ -0,0 +1,161 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/qcom,pcie-qcs615.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QCS615 PCI Express Root Complex > + > +maintainers: > + - Bjorn Andersson <andersson@xxxxxxxxxx> > + - Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > + > +description: > + Qualcomm QCS615 SoC (and compatible) PCIe root complex controller is based on > + the Synopsys DesignWare PCIe IP. > + > +properties: > + compatible: > + const: qcom,pcie-qcs615 I propose qcom,qcs615-pcie > + > + reg: > + minItems: 6 > + maxItems: 6 > + > + ... > + resets: > + minItems: 1 Use existing code as template, e.g. sm8550, instead of coming with own stuff. Drop. > + maxItems: 1 This fails tests. Best regards, Krzysztof
