Re: [PATCH 2/2] arm64: dts: qcom: Enable Primary USB controller on QCS615 Ride

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On 11/19/2024 2:51 PM, Song Xue wrote:


On 11/19/2024 1:28 PM, Krishna Kurapati wrote:
Enable primary USB controller on QCS615 Ride platform. The primary USB
controller is made "peripheral", as this is intended to be connected to
a host for debugging use cases.

For using the controller in host mode, changing the dr_mode and adding
appropriate pinctrl nodes to provide vbus would be sufficient.

Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/qcs615-ride.dts | 23 +++++++++++++++++++++++
  1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index ee6cab3924a6..b647c87b030b 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -214,6 +214,29 @@ &uart0 {
      status = "okay";
  };
+&usb_1_hsphy {
+    vdd-supply = <&vreg_l5a>;
+    vdda-pll-supply = <&vreg_l2a>;
+    vdda-phy-dpdm-supply = <&vreg_l13a>;
+
+    status = "okay";
+};
+
 From schematic, we need use the "vreg_l12a" for vdda-pll-supply.

From bindings, we also can see need 1.8V(VREG_L12A_1P8) not 2.9V(VREG_L2A_2P96):

62vdda-pll-supply:
63     description:
64       Phandle to 1.8V regulator supply to PHY refclk pll block.


Thanks for pointing it out. It is supposed to be L12. Will fix up in v2.

+&usb_qmpphy {
+    vdda-phy-supply = <&vreg_l5a>;
+    vdda-pll-supply = <&vreg_l12a>;
+
+    status = "okay";
+};
+
+&usb_1 {
+    status = "okay";
+};
+
+&usb_1_dwc3 {
+    dr_mode = "peripheral";
+};
+
  &watchdog {
      clocks = <&sleep_clk>;
  };
Thanks,
Song




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