Re: [PATCH v3 3/3] spi: fsl-dspi: Add ~50ns delay between cs and sck

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 




On Fri, Apr 03, 2015 at 01:39:31PM -0700, Aaron Brice wrote:
> Add delay between chip select and clock signals, before clock starts and
> after clock stops.

Applied, thanks.

Attachment: signature.asc
Description: Digital signature


[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]
  Powered by Linux